1. Field of the Invention
The present invention relates to a nonvolatile memory and a memory system having an error correction capability.
2. Description of the Related Art
Nonvolatile memories are characterized by their ability to retain stored contents therein when power is removed. It is therefore important for the stored data in the memory to stay reliable.
Many nonvolatile memories have more trouble letting stored data be read out correctly therefrom the more often the data has been retrieved after it was written thereto and the longer the data has been retained therein. The repeated data readout and prolonged data retention can deteriorate the stored data and lead to bit errors thereof.
The bottleneck above has been bypassed so far by writing error correction code (ECC) along with data upon storage. At read time, error detection and correction processes are carried out to improve the reliability of the retrieved data.
As an example of the error occurrence probability for nonvolatile memories, two bit error rates of 8-gigabit NAND flash memories are cited by N. Mielke, T. Marquart, N. Wu, J. Kessenich, H. Beigal, E. Schares, F. Trivedi, E. Goodness, and Leland R. Nevill in “Bit Error Rate in NAND Flash Memories,” IEEE CFPO8RPS-DCR, 46th Annual International Reliability Physics Symp., 2008 (hereinafter as Non-Patent Document). The document also discusses bit error rates relative to data retention periods and data retrieval frequencies.
One of the bit error rates cited in the Non-Patent Document above concerns memory cells on which maximum allowable rewrites were performed. The bit error rate of these memory cells upon elapse of 2,000 hours was shown to be about 1.0E-7.
Another bit error rate cited in the Non-Patent Document above concerns memory cells on which maximum allowable rewrites were also carried out. The bit error rate of these memory cells following read operations repeated 10,000 times was also shown to be about 1.0E-7.
When data is written back to those cells of the nonvolatile memory that developed the aforementioned data errors, the data retention period of the memory is reset. This renders the nonvolatile memory refreshed to have data written thereto and read therefrom correctly again. The process of writing back correct data to the nonvolatile memory is an effective way to prolong the data retention period of the memory in question.